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Profession Information About Leon Mathew Furgason


Leon held US Patent No. 4,806,907, Apparatus and method for digital data transmission. The application for this patent was filed on 4 Aug 1986. The patent was issued on 21 Feb 1989. The patent has expired.


Information about this patent from www.patentbuddy.com:

"Abstract: An apparatus and method for encoding a digital data signal, which apparatus and method converts a digital data signal to a string of truncated and extended pulses, the truncated pulses corresponding to a digital "0" and the extended pulses corresponding to a digital "1". The frequency of the leading edges of all of the pulses in this pulse string is the clock frequency such that a clock signal can be generated by the receiver directly to synchronize the receiver to the transmitter. Further, the trailing edge of the transmitted pulses contain the data information. Specifically, the pulses are varied in length with a truncated pulse corresponding to a digital "0" and an elongated pulse corresponding to a digital "1". A decoding apparatus is also described for decoding the encoded signal to generate a digital signal corresponding to the original data signal to be encoded.

"First Claim: 1. An electronic circuit for encoding a digital signal containing data information and consisting of the string of pulses of two different states, the pulse of the first state representing a digital '1' and the pulse of the second state representing a digital '0' comprising:shift register means for receiving the digital signal to be encoded from an external source which digital signal is clocked into the shift register means under control of a clock signal consisting of a square wave and a clock frequency;means for generating pulses of truncated length, the truncated pulses having a leading edge corresponding to a leading edge of the clock pulse and appearing at the clock frequency, and having a pulse width less than the pulse width of the clock signal;means for generating pulses of extended length, the extended pulses having a leading edge corresponding to a leading edge of the clock pulse and occurring at the clock frequency and having a pulse greater than the pulse width of the clock signal;logic gating means for permitting a truncated pulse to pass when the digital signal pulse corresponds to a digital '0' and for permitting an extended pulse to pass when the data pulse corresponds to a digital '1';the logic gating means including means for creating an inverted digital signal, a first AND gate means having a first input terminal, a second input terminal, a pulse of truncated length being transmitted to the first input terminal, and the inverted digital signal being transmitted to the second input terminal;the logic gating means further including a second AND gate having a first input terminal and second input terminal and an output terminal, the digital signal being transmitted to the first input terminal and a pulse of extended length being transmitted to the second input terminal;the logic gating means further including an OR gate having a first input terminal and a second input terminal and an output terminal, the first input terminal being connected to the output terminal of the first AND gate, and the second input terminal being connected to the output terminal of the second AND gate;whereby the output of the OR gate is an encoded signal where the leading edges of each pulse contains information as to the clock frequency and the trailing edge of each pulse contains the data information of the digital signal being encoded."
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